{"id":3179,"date":"2024-08-26T22:37:31","date_gmt":"2024-08-26T22:37:31","guid":{"rendered":"https:\/\/workhouse.sweetdishy.com\/?p=3179"},"modified":"2024-08-26T22:37:32","modified_gmt":"2024-08-26T22:37:32","slug":"applying-complex-numbers-to-parallel-ac-circuits","status":"publish","type":"post","link":"https:\/\/workhouse.sweetdishy.com\/index.php\/2024\/08\/26\/applying-complex-numbers-to-parallel-ac-circuits\/","title":{"rendered":"Applying Complex Numbers to Parallel AC Circuits"},"content":{"rendered":"\n

As with series circuits, parallel networks may be analyzed by using phasor diagrams. However, with parallel networks containing more than two branches, this can become very complicated. It is with parallel AC network analysis in particular that the full benefit of using complex numbers may be appreciated. The theory for parallel AC networks introduced previously is relevant; more advanced networks will be analyzed in this chapter using j<\/em> notation. Before analyzing such networks admittance, conductance and susceptance are defined.<\/p>\n\n\n\n

7.6.1 Admittance, Conductance and Susceptance<\/h3>\n\n\n\n

Admittance<\/em> is defined as the current I<\/em> flowing in an AC circuit divided by the supply voltage V<\/em> (i.e., it is the reciprocal of impedance Z<\/em>). The symbol for admittance is Y<\/em>. Thus,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

The unit of admittance is the siemen, S<\/em>.<\/p>\n\n\n\n

An impedance may be resolved into a real part R<\/em> and an imaginary part X<\/em>, giving Z<\/em>=R<\/em>\u00b1jX<\/em>. Similarly, an admittance may be resolved into two parts\u2014the real part being called the conductance G<\/em>, and the imaginary part being called the susceptance B<\/em>\u2014and expressed in complex form. Thus, admittance,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

When an AC circuit contains:<\/p>\n\n\n\n

(a) <\/a>pure resistance, then,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

(b) <\/a>pure inductance, then,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

thus, a negative sign is associated with inductive susceptance, BL<\/sub><\/em>.<\/p>\n\n\n\n

(c) <\/a>pure capacitance, then,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

thus, a positive sign is associated with capacitive susceptance, BC<\/sub><\/em><\/p>\n\n\n\n

(d) <\/a>resistance and inductance in series, then,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

i.e.,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

Thus, conductance, G<\/em>=R<\/em>\/|Z<\/em>|2<\/sup><\/em> and inductive susceptance, BL<\/sub><\/em>=-XL<\/em>\/|Z<\/em>|2<\/sup><\/p>\n\n\n\n

(Note that in an inductive circuit, the imaginary term of the impedance, XL<\/sub><\/em>, is positive, whereas the imaginary term of the admittance, BL<\/sub><\/em>, is negative.)<\/p>\n\n\n\n

(e) <\/a>resistance and capacitance in series, then,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n
\"image\"\/<\/figure>\n\n\n\n

Thus, conductance, G=R\/<\/em>|Z<\/em>|2<\/sup> and capacitive susceptance, BC=XC<\/em>\/|Z<\/em>|2<\/sup><\/p>\n\n\n\n

(Note that in a capacitive circuit, the imaginary term of the impedance, XC<\/sub><\/em>, is negative, whereas the imaginary term of the admittance, BC<\/sub><\/em>, is positive.)<\/p>\n\n\n\n

(a) <\/a>resistance and inductance in parallel, then,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

from which,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

and,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

i.e.,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

or,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

Thus, conductance, G<\/strong><\/em>=1<\/strong>\/R<\/strong><\/em> and inductive susceptance, B<\/strong><\/em>L<\/sub>=\u20131<\/strong>\/X<\/strong><\/em>L<\/sub>.<\/p>\n\n\n\n

(b) <\/a>resistance and capacitance in parallel, then,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

and<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

i.e.,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

or,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

Thus, conductance, G<\/strong><\/em> =1<\/strong>\/R<\/strong><\/em> and capacitive susceptance, BC<\/sub><\/strong><\/em> =l<\/strong>\/XC<\/sub><\/strong><\/em><\/p>\n\n\n\n

The conclusions that may be drawn from sections (d) to (g) above are:<\/p>\n\n\n\n

(i) <\/a>that a series<\/em> circuit is more easily represented by an impedance<\/em>,<\/p>\n\n\n\n

(ii) <\/a>that a parallel<\/em> circuit is often more easily represented by an admittance<\/em> especially when more than two parallel impedances are involved.<\/p>\n\n\n\n

Example 7.11<\/h5>\n\n\n\n

Determine the admittance, conductance and susceptance of the following impedances: (a) \u2013j<\/em>5 \u03a9 (b) (25+j<\/em>40) \u03a9 (c) (3 \u2013j<\/em>2) \u03a9 (d) 50\u222040\u00b0\u03a9.<\/p>\n\n\n\n

Solution<\/h5>\n\n\n\n

.<\/p>\n\n\n\n

(a) <\/a>If impedance Z<\/em>=\u2013j<\/em>5 \u03a9, then,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

Since there is no real part, conductance<\/em>, G<\/strong><\/em> =0<\/strong>, and capacitive susceptance<\/em>, BC<\/sub><\/strong><\/em> =0.2 S.<\/strong><\/p>\n\n\n\n

(b) <\/a>If impedance Z<\/em>=(25+j<\/em>40) \u03a9 then,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

Thus, conductance<\/em>, G<\/strong><\/em> =0.0112 S<\/strong> and inductive susceptance<\/em>, BL<\/sub><\/strong><\/em>=0.0180 S.<\/strong><\/p>\n\n\n\n

(c) <\/a>If impedance Z<\/em>=(3 \u2013j<\/em>2) \u03a9, then,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

Thus, conductance<\/em>, G<\/strong><\/em> =0.231 S<\/strong> and capacitive susceptance<\/em>, BC<\/sub><\/strong><\/em> =0.154 S<\/strong><\/p>\n\n\n\n

(d) <\/a>If impedance Z<\/em>=50\u222040 \u03a9, then,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

(0.0153<\/strong> \u2013j<\/strong><\/em>0.0129) S<\/strong><\/p>\n\n\n\n

Thus, conductance, G<\/strong><\/em>=0.0153<\/strong><\/em> S and inductive susceptance<\/em>, BL<\/sub><\/strong><\/em>=0.0129 S<\/strong>.<\/p>\n\n\n\n

Example 7.12<\/h5>\n\n\n\n

Determine expressions for the impedance of the following admittances: (a) 0.004\u222030 S (b) (0.001 \u2013j<\/em>0.002) S (c) (0.05+j<\/em> 0.08) S.<\/p>\n\n\n\n

Solution<\/h5>\n\n\n\n

(a) <\/a>Since admittance Y<\/em>=1\/Z<\/em>, impedance Z<\/em>=1\/Y<\/em>.<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

(b) <\/a><\/a><\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

(c) <\/a>Admittance Y<\/em>=(0.05+j<\/em>0.08) S=0.094\u222057.99 S<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n
Example 7.13<\/h5>\n\n\n\n

The admittance of a circuit is (0.040+j<\/em>0.025) S. Determine the values of the resistance and the capacitive reactance of the circuit if they are connected (a) in parallel, (b) in series. Draw the phasor diagram for each of the circuits.<\/p>\n\n\n\n

Solution<\/h5>\n\n\n\n

(a) <\/a>Parallel connection<\/p>\n\n\n\n

Admittance\u00a0Y<\/em>=(0.040+j<\/em>0.025) S, therefore conductance,\u00a0G<\/em>=0.040 S and capacitive susceptance,\u00a0BC<\/sub><\/em>=0.025 S. From\u00a0equation (7.1)\u00a0when a circuit consists of resistance\u00a0R<\/em>\u00a0and capacitive reactance in parallel, then\u00a0Y<\/em>=(1\/R<\/em>)+(j\/XC<\/sub><\/em>).<\/p>\n\n\n\n

Hence, resistance \"image\"<\/p>\n\n\n\n

and capacitive reactance \"image\"<\/p>\n\n\n\n

The circuit and phasor diagrams are shown in\u00a0Figure 7.14.<\/p>\n\n\n\n

(b) <\/a>Series connection<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

Figure 7.14<\/strong> (a) Circuit diagram; (b) Phasor diagram<\/p>\n\n\n\n

Admittance Y<\/em>=(0.040+j<\/em>0.025) S, therefore,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

Thus, the resistance<\/strong>, R<\/strong><\/em>=17.98<\/strong> \u03a9 and capacitive reactance<\/strong>, XC<\/sub><\/strong><\/em>=11.24<\/strong> \u03a9<\/a><\/p>\n\n\n\n

The circuit and phasor diagrams are shown in\u00a0Figure 7.15.<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

Figure 7.15<\/strong> (a) Circuit diagram; (b) Phasor diagram<\/p>\n\n\n\n

The circuits shown in\u00a0Figs. 7.14(a)\u00a0and\u00a07.15(a)\u00a0are equivalent in that they take the same supply current\u00a0I<\/em>\u00a0for a given supply voltage\u00a0V<\/em>; the phase angle \u03d5 between the current and voltage is the same in each of the phasor diagrams shown in\u00a0Figs. 7.14(b)\u00a0and\u00a07.15(b).<\/p>\n\n\n\n

7.6.2 Parallel AC Networks<\/h3>\n\n\n\n

Figure 7.16\u00a0shows a circuit diagram containing three impedances,\u00a0Z<\/em>1<\/sub>,\u00a0Z<\/em>2<\/sub>\u00a0and\u00a0Z<\/em>3<\/sub>\u00a0connected in parallel. The potential difference across each impedance is the same, i.e., the supply voltage\u00a0V<\/em>. Current\u00a0I<\/em>1<\/sub>=V\/Z<\/em>1<\/sub>,\u00a0I<\/em>2<\/sub>=V\/Z<\/em>2<\/sub>\u00a0and\u00a0I<\/em>3<\/sub>=V\/Z<\/em>3<\/sub>. If\u00a0ZT<\/sub><\/em>\u00a0is the total equivalent impedance of the circuit then\u00a0I<\/em>=V\/ZT<\/sub><\/em>. The supply current,\u00a0I<\/em>=I<\/em>1<\/sub>+I<\/em>2<\/sub>+I<\/em>3<\/sub>\u00a0(phasorially).<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

Figure 7.16<\/strong> Circuit with three impedances in parallel<\/p>\n\n\n\n

Thus, \"image\" and,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

or total admittance, YT<\/sub><\/em>=Y<\/em>1<\/sub>+Y<\/em>2<\/sub>+Y<\/em>3<\/sub><\/p>\n\n\n\n

In general, for n<\/em> impedances connected in parallel, \"image\" (phasorially)<\/p>\n\n\n\n

It is in parallel circuit analysis that the use of admittance has its greatest advantage.<\/p>\n\n\n\n

7.6.2.1 Current Division in AC Circuits<\/h4>\n\n\n\n

For the special case of two impedances,\u00a0Z<\/em>1<\/sub>\u00a0and\u00a0Z<\/em>2<\/sub>, connected in parallel (see\u00a0Figure 7.17),<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n
\"image\"\/<\/figure>\n\n\n\n

Figure 7.17<\/strong> Two impedances connected in parallel<\/p>\n\n\n\n

The total impedance, Z<\/strong>T<\/sub><\/em> =Z<\/strong><\/em>1<\/sub>Z<\/strong><\/em>2<\/sub>\/(Z<\/strong><\/em>1<\/sub>+Z<\/strong><\/em>2<\/sub>)<\/strong> (i.e., product\/sum).<\/p>\n\n\n\n

From\u00a0Figure 7.17,<\/p>\n\n\n\n

supply voltage,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

Also, V<\/em>=I<\/em>1<\/sub>Z<\/em>1<\/sub> (and V<\/em>=I<\/em>2<\/sub>Z<\/em>2<\/sub>)<\/a><\/p>\n\n\n\n

Thus,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

i.e.,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

Similarly,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

Note that all of the above circuit symbols infer complex quantities either in Cartesian or polar form.<\/p>\n\n\n\n

The following problems show how complex numbers are used to analyze parallel AC networks.<\/p>\n\n\n\n

Example 7.14<\/h5>\n\n\n\n

Determine the values of currents\u00a0I<\/em>,\u00a0I<\/em>1<\/sub>\u00a0and\u00a0I<\/em>2<\/sub>\u00a0shown in the network of\u00a0Figure 7.18.<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

Figure 7.18<\/strong> Network for Example 7.14<\/p>\n\n\n\n

Solution<\/h5>\n\n\n\n

Total circuit impedance,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n
\"image\"\/<\/figure>\n\n\n\n
\"image\"\/<\/figure>\n\n\n\n
\"image\"\/<\/figure>\n\n\n\n
\"image\"\/<\/figure>\n\n\n\n
Example 7.15<\/h5>\n\n\n\n

For the parallel network shown in\u00a0Figure 7.19, determine the value of supply current\u00a0I<\/em>\u00a0and its phase relative to the 40\u00a0V supply.<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

Figure 7.19<\/strong> Parallel network for Example 7.15<\/p>\n\n\n\n

Solution<\/h5>\n\n\n\n

Impedance Z<\/em>1<\/sub>=(5+j<\/em>12) \u03a9, Z<\/em>2<\/sub>=(3 \u2013j<\/em>4) \u03a9 and Z<\/em>3<\/sub>=8 \u03a9 Supply current \"image\" where ZT<\/sub><\/em>=total circuit impedance, and YT<\/sub><\/em>=total circuit admittance.<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

i.e., YT<\/sub><\/em>=(0.2746+j<\/em>0.0890) S or 0.2887\u222017.96 S<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n
\"image\"\/<\/figure>\n\n\n\n

Hence, the current<\/strong>I<\/strong><\/em>is 11.55A and is leading the 40 V supply by 17.96<\/strong>\u00b0.<\/p>\n\n\n\n

Alternatively, current I<\/em>=I<\/em>1<\/sub>+I<\/em>2<\/sub>+I<\/em>3<\/sub><\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n
\"image\"\/<\/figure>\n\n\n\n
\"image\"\/<\/figure>\n\n\n\n

Thus,\"image\"<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n
Example 7.16<\/h5>\n\n\n\n

An AC network consists of a coil, of inductance 79.58 mH and resistance 18 \u03a9, in parallel with a capacitor of capacitance 64.96 \u03bcF. If the supply voltage is 250\u22200 V at 50 Hz, determine (a) the total equivalent circuit impedance, (b) the supply current, (c) the circuit phase angle, (d) the current in the coil, and (e) the current in the capacitor.<\/p>\n\n\n\n

Solution<\/h5>\n\n\n\n

The circuit diagram is shown in\u00a0Figure 7.20.<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n
\"image\"\/<\/figure>\n\n\n\n

Figure 7.20<\/strong> Circuit diagram for Example 7.16<\/p>\n\n\n\n

Hence, the impedance of the coil,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n
\"image\"\/<\/figure>\n\n\n\n

In complex form, the impedance presented by the capacitor ZC<\/sub><\/em> is \u2013jXC<\/sub><\/em>, i.e., \u2013j<\/em>49 \u03a9 or 49\u2220\u201390\u00b0\u03a9.<\/p>\n\n\n\n

(a) <\/a>Total equivalent circuit impedance,<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

(b)<\/p>\n\n\n\n

\"image\"\/<\/figure>\n\n\n\n

(c) <\/a>Circuit phase angle=17.38 lagging, i.e., the current I<\/em> lags the voltage V<\/em> by 17.38.<\/p>\n\n\n\n

(d) <\/a>\"image\"<\/p>\n\n\n\n

(e) <\/a>\"image\"<\/p>\n","protected":false},"excerpt":{"rendered":"

As with series circuits, parallel networks may be analyzed by using phasor diagrams. However, with parallel networks containing more than two branches, this can become very complicated. It is with parallel AC network analysis in particular that the full benefit of using complex numbers may be appreciated. The theory for parallel AC networks introduced previously […]<\/p>\n","protected":false},"author":1,"featured_media":3168,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[428],"tags":[],"class_list":["post-3179","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-complex-numbers"],"jetpack_featured_media_url":"https:\/\/workhouse.sweetdishy.com\/wp-content\/uploads\/2024\/08\/mathematics.png","_links":{"self":[{"href":"https:\/\/workhouse.sweetdishy.com\/index.php\/wp-json\/wp\/v2\/posts\/3179","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/workhouse.sweetdishy.com\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/workhouse.sweetdishy.com\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/workhouse.sweetdishy.com\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/workhouse.sweetdishy.com\/index.php\/wp-json\/wp\/v2\/comments?post=3179"}],"version-history":[{"count":1,"href":"https:\/\/workhouse.sweetdishy.com\/index.php\/wp-json\/wp\/v2\/posts\/3179\/revisions"}],"predecessor-version":[{"id":3180,"href":"https:\/\/workhouse.sweetdishy.com\/index.php\/wp-json\/wp\/v2\/posts\/3179\/revisions\/3180"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/workhouse.sweetdishy.com\/index.php\/wp-json\/wp\/v2\/media\/3168"}],"wp:attachment":[{"href":"https:\/\/workhouse.sweetdishy.com\/index.php\/wp-json\/wp\/v2\/media?parent=3179"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/workhouse.sweetdishy.com\/index.php\/wp-json\/wp\/v2\/categories?post=3179"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/workhouse.sweetdishy.com\/index.php\/wp-json\/wp\/v2\/tags?post=3179"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}